CREAPYX

CREAPYX

The CREAPYX platform has proven track record of success with more than 400 pixel variants designed and tested (over 45 tape-outs across 3 different foundries and 8 CMOS technologies). It allows to quickly validate the best pixel possible for the targeted application and derisk the design of the full image sensor. This platform comes with a HW/SW evaluation kit and chip with customized pixels in a fully proven pixel-frame layout using the targeted technology, such as ST Microelectronics, Tower Semiconductor or LFoundry.

Evaluation Kit (EK)

Electronic Board supporting the CREAPYX chip
USB3 for frame-grabbing and EK control
FX3 handles CREAPYX chip register interface, power supplies and data-link
FPGA handles frame and line sequencing
Dedicated low-noise supplies / analog inputs
Jumper and probes for observability / external supply / auxiliary voltage / current measurements

CREAPYX Chip

Maximum resolution : VGA format
Total die size is 6.0mm (V) x 5.9mm (H) compatible with standard MPW site
Design and layout is made out of following :
Core (Pixel array and interconnections)
Frame (Needed driving and readout circuitry)
Core has a total available area of ~3.3mm (V) x ~2.5mm (H)
Chip package is a 84 lead ceramic LCC sealed with an epoxy glued glass lid (can be removed)

Versatile Pixel Design

Different pixel sizes (1<um up to >500um)
Different architectures (3T, 4T, ..., rolling / global shutter, HDR ..)
Available on multiple CIS process
FSI or BSI
CCD on CMOS
Wide range of power supply inputs, including those that require negative voltage on the pixel control line